Table of Contents

Overview
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Amorphous silicon thin-film transistors (a-Si TFT) are the backbone of LCD display technology. Understanding their I-V characteristics is essential for display circuit design.

Basic Structure
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      Gate
       ↓
┌─────────────────┐
│    Gate Metal   │
├─────────────────┤
│   Gate Insulator│
├─────────────────┤
│     a-Si:H      │ ← Active layer
├───┬─────────┬───┤
│ n+│         │n+ │ ← Contact layer
└───┴─────────┴───┘
Source        Drain

Operating Voltage Ranges
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ParameterRange
Gate voltage (Vgs)-20V to +20V
Drain-source voltage (Vds)0 to 10V
Threshold voltage (Vth)1-3V typical

I-V Characteristics
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Transfer Characteristics (Id vs Vgs)
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Id (log)
    │     ╱────── On region
    │    ╱
    │   ╱
    │  ╱
    │ ╱
    │╱_____________ Vgs
   -5V    0    Vth  20V

Output Characteristics (Id vs Vds)
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Id
    │         _____ Vgs = 20V
    │     ___╱_____ Vgs = 15V
    │   _╱_________ Vgs = 10V
    │ _╱___________ Vgs = 5V
    │╱_____________
    └───────────────── Vds
         Saturation

Operating Regions
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Linear Region
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When \(V_{ds} < V_{gs} - V_{th}\):

$$ I_d = \mu C_{ox} \frac{W}{L} \left[(V_{gs} - V_{th})V_{ds} - \frac{V_{ds}^2}{2}\right] $$

Saturation Region
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When \(V_{ds} \geq V_{gs} - V_{th}\):

$$ I_d = \frac{1}{2} \mu C_{ox} \frac{W}{L} (V_{gs} - V_{th})^2 $$

Above ~20V, current plateaus in full saturation.

Critical Design Fact: Incomplete Switching
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Important: TFTs cannot completely close!

Off-State Behavior
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At \(V_{gs} = -5V\):

  • TFT is “off” but leakage current exists
  • Leakage is in picoampere range
  • Complete off-state is impossible

Leakage Current Equation
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$$ I_{off} = I_0 \cdot e^{(V_{gs} - V_{th})/nkT/q} $$

Factors Increasing Leakage
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FactorEffect
Shorter channel (ΔL)Higher leakage
Higher VdsHigher leakage
Higher temperatureHigher leakage

On/Off Current Ratio
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$$ \frac{I_{on}}{I_{off}} > 10^6 $$

This ratio must be high enough for display operation:

  • Ion: Charges pixel capacitor quickly
  • Ioff: Must hold charge for frame period

Charging Speed
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The charging time constant:

$$ \tau = R_{on} \cdot C_{pixel} $$

Where:

  • \(R_{on}\): TFT on-resistance
  • \(C_{pixel}\): Total pixel capacitance

On-Resistance
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$$ R_{on} = \frac{L}{\mu C_{ox} W (V_{gs} - V_{th})} $$

Lower Ron → faster charging → higher gate voltage needed.

Design Considerations
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Operating Window
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$$ V_{gate,on} = 15-20V $$

$$ V_{gate,off} = -5 \text{ to } -10V $$

This ensures:

  • Complete charging during on-time
  • Minimal leakage during off-time

Leakage Budget
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For 60 Hz (16.7 ms frame):

$$ \Delta V = \frac{I_{leak} \cdot t_{frame}}{C_{st} + C_{lc}} $$

Acceptable \(\Delta V < 50mV\) for imperceptible brightness change.

a-Si TFT Limitations
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LimitationImpact
Low mobility (~0.5 cm²/Vs)Slow switching
Threshold shiftLong-term stability
Light sensitivityGate leakage in bright conditions
Temperature sensitivityPerformance variation

Comparison with Other TFT Types
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Propertya-SiLTPSIGZO
Mobility (cm²/Vs)0.5-150-10010-30
UniformityExcellentModerateGood
CostLowHighMedium
ApplicationLCD TVMobile OLEDHigh-res LCD

Summary
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Key points for a-Si TFT design:

  1. TFTs don’t completely turn off
  2. Leakage current must be budgeted
  3. On/off ratio > 10⁶ required
  4. Charging time limits by Ron × C
  5. Operating voltage: -5V to +20V typical